1. Field of the Invention
Embodiments of the invention relate to semiconductor apparatuses used as ignition systems for the internal combustion engines on automobiles. Specifically, embodiments relate to semiconductor apparatuses exhibiting a current control function.
2. Description of Related Art
A semiconductor apparatus, which incorporates therein a power semiconductor device for controlling the switching of a current on the primary side of an ignition coil, is used for the ignition system of an internal combustion engine for automobiles. FIG. 5 shows a general configuration example of a conventional semiconductor apparatus used as an ignition system for the internal combustion engines. The semiconductor apparatus shown in FIG. 5 employs an insulated gate bipolar transistor (hereinafter referred to as an “IGBT”) as a power semiconductor device.
The ignitor semiconductor apparatus shown in FIG. 5 includes electronic engine control unit (hereinafter referred to as “ECU”) 1, ignitor semiconductor integrated circuit (hereinafter referred to as “IC”) 2, ignition coil 3, voltage source 4, and spark plug 5.
IC 2 includes, in the output stage thereof, output stage IGBT 11 that controls the ON and OFF of the primary current of ignition coil 3. IC 2 further includes sensing IGBT 12 for detecting a sensing current, the collector and gate thereof are connected in common to the collector and gate of output stage IGBT 11, respectively; sensing resistance 13 for detecting the sensing current; gate resistance 14; and current control circuit 10 that controls the collector current of output stage IGBT 11. IC 2 further includes three terminals; C terminal (collector electrode), E terminal (emitter electrode), and G terminal (gate electrode). C terminal is connected to ignition coil 3, E terminal to the earth potential, and G terminal to ECU 1.
Now the operations of the ignitor semiconductor apparatus shown in FIG. 5 will be described below.
ECU 1 feeds the signal, which controls the ON and OFF of output stage IGBT 11 in IC 2, to G terminal. For example, as a voltage of 5 V is fed to G terminal, output stage IGBT 11 is turned ON. As a voltage of 0 V is fed to G terminal, output stage IGBT 11 is turned OFF.
As an ON-signal is fed from ECU 1 to G terminal, output stage IGBT 11 in IC 2 is turned ON and a collector current Ic starts flowing to C terminal of IC 2 from voltage source 4 (e.g. 14 V) via primary coil 6 in ignition coil 3. The dl/dt of the collector current Ic is determined by the primary coil 6 inductance and the applied voltage. After the collector current Ic increases to a constant current value (e.g., 13 A) controlled by current control circuit 10, the collector current Ic keeps the constant current value.
As an OFF-signal is fed to the G terminal from ECU 1, output stage IGBT 11 in IC 2 is turned OFF and the collector current Ic decreases rapidly. By the rapid Ic change, the voltage across primary coil 6 rises rapidly. At the same time, the voltage across secondary coil 7 rises to several tens kV. (e.g. 30 kV) and the rising voltage is applied to spark plug 5. Spark plug 5 discharges, as the voltage applied thereto exceeds 10 kV to the higher side.
When an ON-signal is fed from ECU 1 for a predetermined period or longer or when the IC 2 temperature is higher than a predetermined temperature, a circumstance in that ignition coil 3 or IC 2 may burn, a self-interrupter circuit incorporated in current control circuit 10 will work to interrupt the collector current Ic. However, if the collector current Ic is interrupted suddenly, spark plug 5 will discharge at a timing not set in advance, and the engine will be damaged. Therefore, it is beneficial to control the dl/dt of the collector current Ic within the range, in which spark plug 5 does not malfunction to spark.
FIG. 6 is a circuit diagram showing the circuit configuration of current control circuit 10.
Current control circuit 10 shown in FIG. 6 is driven by the voltage between G and E terminals. Current control circuit 10 includes reference voltage circuit 31, level shift circuits 32 and 34, self-interrupter circuit 33, comparator circuit 35, and metal-oxide-semiconductor field-effect transistor (hereinafter referred to as “MOSFET”) 36.
Reference voltage circuit 31 includes a bias circuit including depression metal-oxide-semiconductor field-effect transistor (hereinafter referred to as DepMOSFET”) 311 and MOSFET 312 connected in series to each other such that the gates thereof are connected in common. Reference voltage circuit 31 feeds a reference voltage Vref obtained by dividing the voltage generated by the bias circuit with resistance 313 and resistance 314.
Level shift circuit 32 includes a bias circuit including DepMOSFET 321 and MOSFET 322 connected in series to each other such that the gates thereof are connected in common, MOSFET 323 constituting a current mirror circuit with MOSFET 322, and DepMOSFET 324 connected in series to MOSFET 323. Level shift circuit 32 controls the gate of DepMOSFET 324 with the reference voltage Vref to generate a shifted reference voltage, the level thereof is a predetermined rate of the reference voltage Vref level, and feeds the shifted reference voltage.
Self-interrupter circuit 33 includes a bias circuit including DepMOSFET 331 and MOSFET 332 connected in series to each other such that the gates thereof are connected in common, MOSFET 333 constituting a current mirror circuit with MOSFET 332, MOSFET 334 connected in series to MOSFET 333, and capacitor 335. The ON and OFF of MOSFET 334 is controlled by an interruption signal SD generated by a timer circuit, a temperature detector circuit or such a not-shown anomaly detection means. MOSFET 334 is ON in the usual operations and OFF in the unusual operations. By setting the ON-state resistance of MOSFET 334 to be much lower than the ON-state resistance of MOSFET 333, self-interrupter circuit 33 feeds a shifted reference voltage, obtained by shifting the level of the reference voltage Vref, without further modification in the usual operations. In the unusual operations, self-interrupter circuit 33 lowers the output voltage therefrom gradually by discharging the voltage charged in capacitor 335 by MOSFET 333.
Level shift circuit 34 includes a bias circuit including DepMOSFET 341 and MOSFET 342 connected in series to each other such that the gates thereof are connected in common, MOSFET 343 constituting a current mirror circuit with MOSFET 342, and DepMOSFET 344 connected in series to MOSFET 343. Level shift circuit 34 controls the gate of DepMOSFET 344 with a sensing voltage Vsns detected by converting a current value proportional to the collector current Ic to a voltage value with sensing IGBT 12 and sensing resistance 13. Level shift circuit 34 generates a shifted sensing voltage, the level thereof is a predetermined rate of the sensing voltage Vsns level, and feeds the shifted sensing voltage.
Comparator circuit 35 compares the output from self-interrupter circuit 33 and the output from level shift circuit 34 and controls the ON and OFF of MOSFET 36 based on the results of comparison. When the sensing voltage Vsns, the level thereof is shifted, is equal to or lower than the reference voltage Vref, the level thereof is shifted, MOSFET 36 is turned OFF. When the sensing voltage Vsns, the level thereof is shifted, is higher than reference voltage Vref, the level thereof is shifted, MOSFET 36 is turned ON.
The operations of the ignitor semiconductor apparatus shown in FIG. 5 are described below.
FIGS. 7(A) and 7(B) show operation waveforms relating to the current Ic control. FIG. 7(A) describes the self-interruption operation after the collector current Ic reaches the current limit value Ilim. FIG. 7(B) describes the self-interruption operation in the state, in which the collector current Ic is not so high as to reach the current limit value Ilim. Although the levels of reference voltage Vref and the sensing voltage Vsns are shifted by level shift circuits 32 and 34, for sake of continued clarity, the descriptions in connection with the level shifts are omitted below.
As an ON-signal (e.g. 5 V) is fed from ECU 1 in FIG. 7(A), the collector current Ic flows and the sensing voltage Vsns rises. As the sensing voltage Vsns reaches the reference voltage Vref, MOSFET 36 is turned ON and the gate voltage VGout of output stage IGBT 11 lowers. Comparator circuit 35 controls so that the sensing voltage Vsns may be equal to the reference voltage Vref (at the time t1). Then, as the self-interruption signal SD is fed, the output from self-interrupter circuit 33 lowers gradually from the reference voltage Vref and the gate voltage VGout of output stage IGBT 11 also lowers to keep the relation Vref=Vsns (at the time t2). As the gate voltage VGout of output stage IGBT 11 becomes equal to the threshold voltage Vth of IGBT 11 (e.g., 2 V), self-interrupter circuit 33 interrupts the collector current Ic completely (at the time t3).
The output from self-interrupter circuit 33 drops to around 0 V by the discharge from capacitor 335. However, for keeping the complete interruption of the collector current Ic, it is necessary to maintain the relation Vsns>Vref>0, even when Ic=0. Level shift circuit 34 is disposed for maintaining the relation Vsns>Vref>0. (Level shift circuit 32 is disposed to adjust the reference voltage side characteristics to the sensing side characteristics.) Since the output voltage from self-interrupter circuit 33 keeps falling after the sensing voltage Vsns reaches the lower limit value and becomes constant, the output voltage from comparator circuit 35 rises rapidly after the time t3 and the gate voltage VGout drops rapidly.
In the case, in which the voltage source 4 voltage becomes low and the collector current Ic does not reach the current limit value Ilim as illustrated in FIG. 7(B), a self-interruption signal SD is fed to self-interrupter circuit 33. As self-interrupter circuit 33 starts the self-interruption operation and the reference voltage Vref becomes equal to the sensing voltage Vsns, the gate voltage VGout drops rapidly (at the time t4). The rapid drop of the gate voltage VGout makes the collector current Ic oscillate and spark plug 5 malfunction to spark.
Japanese Unexamined Patent Application Publication No. 2001-153012 (also referred to herein as “Patent Document 1”) describes a method for obviating the erroneous ignition caused by the Ic oscillation. The method proposed in Patent Document 1 disposes a series circuit of an IGBT for voltage suppression and a diode for overshoot voltage suppression in parallel to the output stage IGBT. As the collector voltage rises to exceed the breakdown voltage of the diode while the output stage IGBT is operating, the diode breaks down and a current flows through the IGBT for voltage suppression to limit the collector voltage at a constant value.
Japanese Unexamined Patent Application Publication No. 2002-371945 (also referred to herein as “Patent Document 2”) describes a voltage monitoring circuit for detecting the collector voltage of an output stage IGBT and a control current adjusting circuit for controlling, with the output from the voltage monitoring circuit, the current that flows to the gate of the output stage IGBT. As the current limitation of the output stage IGBT starts and the collector voltage rises, the voltage monitoring circuit starts operating and the gate voltage of the output stage IGBT is raised via the control current adjusting circuit to suppress the collector voltage rise.
The conventional ignitor apparatuses for internal combustion engines pose the problems as described below.
In the conventional ignitor semiconductor apparatus shown in FIG. 5, the collector current Ic of the output stage IGBT oscillates, while the current control circuit or the self-interrupter circuit is operating, and the spark plug malfunctions to spark.
The ignitor semiconductor apparatuses disclosed in the Patent Documents 1 and 2 take countermeasures against the collector current Ic oscillation of the output stage IGBT, while the current control circuit is operating. However, the Patent Documents 1 and 2 describe nothing on the countermeasures against the collector current Ic oscillation of the output stage IGBT, while the self-interrupter circuit is operating. Therefore, the ignitor semiconductor apparatuses disclosed in Patent Documents 1 and 2 can cause problems similar to the problems that the conventional ignitor semiconductor apparatus shown in FIG. 5 causes.
In view of the foregoing, it would be desirable to obviate or minimize the problems described above. It would be also desirable to provide an ignitor semiconductor apparatus that prevents the collector current Ic of an output stage IGBT from oscillating and a spark plug from malfunctioning to spark while a current control circuit or a self-interrupter circuit is operating.